Dolphin Design is an innovative and fast-growing semiconductor company.
It employs more than 180 people, including 140 engineers who design the key functions of an integrated circuit - called "IP blocks or platforms" - or even the complete integrated circuit - called ASIC or System-on-Chip (SoC). Our company has unique know-how in optimizing energy efficiency, which earned us the honor of being one of the 1000 companies worldwide to receive the Solar Impulse label.
Alongside our customers, which today number more than 600 companies, including Intel, Airbus and Qualcomm, we focus on long-term, human and ingenious collaborations that enable billions of people to use electronic equipment or devices every day. Whether our customers are targeting consumer electronics markets, including IoT, multimedia, AI and 5G, or automotive and aerospace markets, we help them unleash their creativity to make their products more competitive while being more responsible with their energy consumption.
Our motto to our customers is simple: "Tell us your biggest dream. Dare the impossible. We make it happen".
The chosen candidate will be a Senior Design & Verification Engineer integrated to the Power Management development team and help drive Dolphin Design’s product development. As a member of a multi-disciplinary team (analog + digital products), you will be expected to develop the best architecture of Power Management products, such as Battery Charger, ePMU, Adaptive Body-Bias and Adaptive Voltage Scaling solutions. You will help drive insightful and critical design and verification decisions to reach performance and power target objectives for our pure-logic and mixel-signal products.
The candidate will interact closely with other leaders and teams within the group, including project manager, architects, analog and logic designers and applications engineering. In addition, the successful candidate will drive new technology innovation. Overall, excellent communications skills, strategic vision, and consensus-building are all key skillsets for this role.
Design and verification engineers at Dolphin Design are given key responsibilities at the development stage of the product development pipeline, including early discussions with architects to assess product requirements, rapid feature development and deployment. Candidates for this role must have a strong and multi-disciplinary technical background and the ability to drive results across organizational boundaries.
- Product development – Design:
Responsible for the design implementation choices and features development of the product. Work closely with the architect to develop the design of the product based on the specification.
Develop product considering functional and power aware aspects. Make trade-offs between requirements (technical and non-technical) and development costs.
Provide support to project team members (verification and middle-end activities teams) during project execution.
- Product Development - Verification:
Responsible for the functional and power-aware verification of the product. Work closely with the architect and designers to define the verification objectives and strategy of the product based on the specification.
Provide support to project team members (design activities teams) during project execution.
Contribute to the continuous improvement and maintenance of the verification methodology and flow.
Add to the in-house expertise regarding verification to consult with, educate, and train design staff members.
Provide internal support and guidance for design and verification activities. Participate in project assessment, set-up and execution working closely with project managers and others team members.
You have more than 10 years of experience in microelectronics and are a strong team player with good communication and leadership skills.
- Design and verification methodologies
- RTL coding (VHDL, Verilog, SystemVerilog), lint, CDC checks
- UPF standards: UPF2.0/2.1 and static checks methodologies for low power design
- Lint, CDC methodology with Questa CDC is a plus
- uVM-based testbench infrastructure
- Formal verification with QuestaFormal is a plus
- Low-power SoC architecture, design and implementation flows for ultra-low-power consumption
- EDA tools from Cadence, Mentor and Synopsys covering all steps of the flow
- Scripting: Tcl, Shell, Perl, Python …
- Linux/Windows working environment
- Require MS w/ 7+ yrs in Electrical Engineering, Computer Engineering, Computer Science or related equivalent.
- Require 5+ years as a design and verification engineer, establishing state-of-the-art design.
- Require knowledge of RTL coding including design checks (CDC, coding rules ..)
- Require knowledge of uVM-based verification methodology
- Experience with formal verification is a big plus
- Experience in UPF design is a big plus.